Background and Objectives: The availability of functional analog models of basic and auxiliary ternary logic elements of combinational logic in systems of computer-aided design enables the accurate modeling of complex digital ternary devices. However, implementing a ternary processor model additionally requires a special class of ternary circuits – ternary sequential logic devices. Such circuits possess the property of “memory” and effectively act as the “engine” that drives the processor system. Therefore, the goal of this work was to develop ternary sequential logic devices necessary for creating a ternary processor model. Materials and Methods: A software package for analysis and automatic design of electronic circuits was used for developing sequential ternary logic circuits. This program made it possible to analyze transient processes, parameters and interaction features of the developed ternary logic circuits. Results: Based on analog models of basic and additional ternary logic elements, ternary asynchronous and synchronous RS flip-flop, ternary static D-latch and two-stage master-slave D-flip-flop, ternary counting up and counting down trigger, ternary asynchronous multi-trit counter have been designed. Conclusion: The developed devices, along with the previously presented basic ternary logic elements and combinational logic units, make it possible to further implement a working model of a ternary processor based on them.